Anya
05-10-2010, 08:19 PM
What will be the logic levels on the external SRC buses when each of the given SRC instruction is executing on the processor? Complete Table: A all numbers are in the decimal number system, unless noted otherwise. (Assume the required missing information if necessary). Also Specify memory addressing modes for each of the SRC instructions given in Table.
SRC instruction RTL Equivalent Address Bus<31….0> Data Bus <31….0> MRead MWrite Addressing mode
Ld r7,12(r3)
Ld r1,4
Ld r6, M[r3]
Move r2, r9
SRC instruction RTL Equivalent Address Bus<31….0> Data Bus <31….0> MRead MWrite Addressing mode
Ld r7,12(r3)
Ld r1,4
Ld r6, M[r3]
Move r2, r9