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Question No: 17 ( Marks: 2 )
Write the following statement of an Arithmetic Ins
If op-code is 0, the instruction is ‘add’. The valu
added and the result is stored in register rc
Question No: 18 ( Marks: 2 )
Given below are the various fields of an SRC instruction
a) operation code field :
b) target register field :
c) operand, address index, or branch target register :
d) second operand, conditional test, or shift count regist
Rewrite these various fields of an SRC instruction, using
Question No: 19 ( Marks: 2 )
How can you define microprogram?
Question No: 20 ( Marks: 3 )
What is the role of timing step generator in a processor?
Question No: 21 ( Marks: 3 )
What is the utility of reset operation and when it is r
Question No: 22 ( Marks: 5 )
Write the Structural RTL description for un-conditional jump
uni-bus data path implementation.
jump [ra+c2]
Question No: 23 ( Marks: 5 )
What function is performed by the reset operation of a processor? What are the
two types of reset operations?
2nd paper
There were 23 questions 1-14 are mcqs others are questions
Q : DEFINE HARD RESET AND SOFT RESET OPERATIONS IN SRC
Q : Write two pipelining problem and define them briefly.
Q : What information is provided by the addressing modes of some processors?
Q : eLEBORATE PRE-FATCHING CONCEPT?
Q : Write RTL functions and there was a rb +rc instruction.
Q : how we speed-up a computer?
Q : Write execution time of an instruction(there was a description too)
Q : Types of instructions
Q : How you represent register data field?
CS501-Advance Computer Architecture
Midterm Special 2006
Q1
_____________all memory systems are dumb, in that they respond to only two
commands: read or write
Virtually
Logically
Physically
None of These
Q 2
Consider two programs having three types of instructions given as follows
[10]
Number of
Data transfer instructions
Control instructions
ALSU instructions
Program 1
7
3
6
Program 2
12
5
3
Instructions Type
Control
ALSU
Data Transfer
CPI
5
3
4
Compare both the programs for the following parameters:
1. Instruction count ( IC )
2. Speed of execution ( ET )
Q 3
To access an operand in memory, the CPU must first generate an address, which it then
issues to the __________
MEMORY
REGISTER
DATA BUS
ALL OF ABOVE
Q 4
___________ or Branch instructions affect the order in which instructions are performed,
or control the flow of the program
Control
DATA MOVMENT
Arithmetic
LOGICAL
Q5
Reverse assemble the following SRC machine language instructions:
[10]
68C2003A h
Q6
An instruction that specifies one operand in memory and one operand in a register would
be known as a __________ address instruction.
2-1/2
1-1/2
0
2
Q7
The data movement instructions ___________ data within the machine and to or from
input/output devices
Store
LOAD
MOVE
NONE OF ABOVE.
Q8
Write short answers to the following questions:
[3 x 5]
a. What is the advantage of a linker in the development of assembly language
programs?
Solution:-
The linker:
When developing large programs, different people working at the same time can
develop separate modules of functionality. These modules can then be ‘linked’ to
form a single module that can be loaded and executed. The modularity of
programs, that the linking step in assembly language makes possible, provides the
same convenience as it does in higher-level languages; namely abstraction and
separation of concerns. Once the functionality of a module has been verified for
correctness, it can be re-used in any number of other modules. The programmer
can focus on other parts of the program. This is the so-called “modular” approach,
or the “top-down” approach.
b. Define term “Single stepping”.
Solution:-
Single stepping:
Single stepping and breakpoints that allow the examination of the status of
the program and registers at desired points during execution.
c. Define term “Type checking”.
Solution:-
Type Checking:-
High-level languages provide various primitive data types, such as integer,
Boolean and a string, that a programmer can use. Type checking provides for the
verification of proper usage of these data types. It allows the compiler to determine
memory requirements for variables and helping in the detection of bad programming
practices.
On the other hand, there is generally no provision for type checking at the machine
level, and hence, no provision for type checking in assembly language. The machine only
sees strings of bits. Instructions interpret the strings as a type, and it is usually limited to
signed or unsigned integers and floating point numbers. A given 32-bit word might be an
instruction, an integer, a floating-point number, or 4 ASCII characters. It is the task of the
compiler writer to determine how high-level language data types will be implemented
using the data types available at the machine level, and how type checking will be
implemented.
d. Define term “Instruction set”.
Solution:-
Instruction Set
A collection of all possible machine language commands that a computer can understand
and execute is called its instruction set. Every processor has its own unique instruction
set. Therefore, programs written for one processor will generally not run on another
processor. This is quite unlike programs written in higher-level languages, which may be
portable. Assembly/machine languages are generally unique to the processors on which
they are run, because of the differences in computer architecture.
Three ways to list instructions in an instruction set of a computer:
• by function categories
• by an alphabetic ordering of mnemonics
• by an ascending order of op-codes
e. Why computer logic design is different from classical logic design?
Solution:-
Classical logic design versus computer logic design:
The traditional sequential circuit design techniques for a finite state machine are not
very practical when it comes to the design of a computer, in spite of the fact that a
computer is a finite state machine. The reason is that employing these techniques is
much too complex as the computer can assume hundreds of states
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u pray for me i pray 4 all.
S501 MIDTERM PAPERS LATEST ALL IN ONE THREAD FALL 2011 MONTH OF MAY
PAPER#1
1. What is relation b/w data path and control unit in SRC processors…….2marks
2. Define Pre-fetching……….2marks
3. Write the structural RTL for “ in ra, rb” ……….3marks
4. What is difference between Latency and Throughput……3marks
5. Write the Structural RTL for “call ra, rb”……….5marks
6. What are the pipeline problems. Describe each briefly…. 5marks
How can you define microprogram? (2 Marks)
A question about to define the shift right instruction? (2 Marks)
What is the utility of reset operation and when it is required? (3 Marks)
Structural RTL instructions definition? (3 Marks)
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