Question No: 1 ( Marks: 1 ) - Please choose one

"A + B = B + A" is __________

► Demorgan’s Law

► Distributive Law

► Commutative Law

► Associative Law

Question No: 2 ( Marks: 1 ) - Please choose one

The diagram given below represents __________

► Demorgans law

► Associative law

► Product of sum form

► Sum of product form

Question No: 3 ( Marks: 1 ) - Please choose one

Following is standard POS expression

► True

► False

Question No: 4 ( Marks: 1 ) - Please choose one

An alternate method of implementing Comparators which allows the Comparators to be easily cascaded without the need for extra logic gates is _______

► Using a single comparator

► Using Iterative Circuit based Comparators

► Connecting comparators in vertical hierarchy

► Extra logic gates are always required.

Question No: 5 ( Marks: 1 ) - Please choose one

Demultiplexer is also called

► Data selector

► Data router

► Data distributor

► Data encoder

Question No: 6 ( Marks: 1 ) - Please choose one

The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________

► Doesn’t have an invalid state

► Sets to clear when both J = 0 and K = 0

► It does not show transition on change in pulse

► It does not accept asynchronous inputs

Question No: 7 ( Marks: 1 ) - Please choose one

A positive edge-triggered flip-flop changes its state when ________________

► Low-to-high transition of clock

► High-to-low transition of clock

► Enable input (EN) is set

► Preset input (PRE) is set

Question No: 8 ( Marks: 1 ) - Please choose one

A flip-flop is connected to +5 volts and it draws 5 mA of current during its operation, the power dissipation of the flip-flop is

► 10 mW

► 25 mW

► 64 mW

► 1024

Question No: 9 ( Marks: 1 ) - Please choose one

____________ counters as the name indicates are not triggered simultaneously.

► Asynchronous

► Synchronous

► Positive-Edge triggered

► Negative-Edge triggered

Question No: 10 ( Marks: 1 ) - Please choose one

74HC163 has two enable input pins which are _______ and _________

► ENP, ENT

► ENI, ENC

► ENP, ENC

► ENT, ENI

Question No: 11 ( Marks: 1 ) - Please choose one

The divide-by-60 counter in digital clock is implemented by using two cascading counters:

► Mod-6, Mod-10

► Mod-50, Mod-10

► Mod-10, Mod-50

► Mod-50, Mod-6

Question No: 12 ( Marks: 1 ) - Please choose one

In a state diagram, the transition from a current state to the next state is determined by

► Current state and the inputs

► Current state and outputs

► Previous state and inputs

► Previous state and outputs

Question No: 13 ( Marks: 1 ) - Please choose one

A synchronous decade counter will have _______ flip-flops

► 3

► 4

► 7

► 10

Question No: 14 ( Marks: 1 ) - Please choose one

________ is used to minimize the possible no. of states of a circuit.

► State assignment

► State reduction

► Next state table

► State diagram

Question No: 15 ( Marks: 1 ) - Please choose one

A multiplexer with a register circuit converts _________

► Serial data to parallel

► Parallel data to serial

► Serial data to serial

► Parallel data to parallel

Question No: 16 ( Marks: 1 ) - Please choose one

The alternate solution for a demultiplexer-register combination circuit is _________

► Parallel in / Serial out shift register

► Serial in / Parallel out shift register

► Parallel in / Parallel out shift register

► Serial in / Serial Out shift register

Question No: 17 ( Marks: 1 ) - Please choose one

A GAL is essentially a ________.

► Non-reprogrammable PAL

► PAL that is programmed only by the manufacturer

► Very large PAL

► Reprogrammable PAL

Question No: 18 ( Marks: 1 ) - Please choose one

The output of this circuit is always ________.

► 1

► 0

► A

►

Question No: 19 ( Marks: 1 ) - Please choose one

DRAM stands for __________

► Dynamic RAM

► Data RAM

► Demoduler RAM

► None of given options

Question No: 20 ( Marks: 1 ) - Please choose one

in ____________, all the columns in the same row are either read or written.

► Sequential Access

► MOS Access

► FAST Mode Page Access

► None of given options

Question No: 21 ( Marks: 1 ) - Please choose one

FIFO is an acronym for __________

► First In, First Out

► Fly in, Fly Out

► Fast in, Fast Out

► None of given options

Question No: 22 ( Marks: 1 ) - Please choose one

In order to synchronize two devices that consume and produce data at different rates, we can use _________

► Read Only Memory

► Fist In First Out Memory

► Flash Memory

► Fast Page Access Mode Memory

Question No: 23 ( Marks: 1 ) - Please choose one

A frequency counter ______________

► Counts pulse width

► Counts no. of clock pulses in 1 second

► Counts high and low range of given clock pulse

► None of given options

Question No: 24 ( Marks: 1 ) - Please choose one

The sequence of states that are implemented by a n-bit Johnson counter is

► n+2 (n plus 2)

► 2n (n multiplied by 2)

► 2n (2 raise to power n)

► n2 (n raise to power 2)

Question No: 25 ( Marks: 1 ) - Please choose one

Stack is an acronym for _________

► FIFO memory

► LIFO memory

► Flash Memory

► Bust Flash Memory

Question No: 26 ( Marks: 1 ) - Please choose one

The 4-bit 2’s complement representation of “+5” is _____________

► 1010

► 1110

► 1011

► 0101

Question No: 27 ( Marks: 2 )

Explain the erase operation in context of Flash Memory.

Question No: 28 ( Marks: 2 )

Explain the difference between 1-to-4 Demultiplexer and 2-to-4 Binary Decoder?

Question No: 29 ( Marks: 2 )

Some of the counters (e.g. 74HC163) are called pre-set counters. why?

Question No: 30 ( Marks: 2 )

How many bytes will be there in 32 K x 8 memory?

Question No: 31 ( Marks: 3 )

Differentiate between truth table and next-state table

Question No: 32 ( Marks: 3 )

Name the three types of errors Analogue to Digital converters exhibit during their conversion operation.

Question No: 33 ( Marks: 3 )

How can a serial in/parallel out register be used as a serial in/serial out register?

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Question No: 34 ( Marks: 5 )

Explain the implementation of First In First Out (FIFO) Memory by using RAM.

Question No: 35 ( Marks: 5 )

Explain memory read operation with the help of an example

Question No: 36 ( Marks: 5 )
Explain the next-state table with the help of a table for any sequential circuit.