Reply With QuoteAll FF are just small asynchronous state machines. At one time it was useful to think in terms of individual FF operation rather than the larger design. Especially the now extinct JK FF reflected the concepts of analog design carried over to digital systems, but analog systems are mostly single signals and not multi-bit symbols or states. The concept of "edge-triggered" is actually misleading because what actually happens is the clock or set/reset inputs can be removed after some short time when the FF feedback has arrived to maintain the new state, so what matters is not the transition but the minimum pulse width in the clock or set/reset signal. You should know what these things are and modern logic design systems usually includes the := (colon-equal) operator to signify a (~DFF) registered signal, but no significant digital design is done with discrete FF chips and gates. You need to know how to program a FPGA or other PLD but forget ~7400 chips. You will need to know how to design for PCB trace impedance and avoid reflections, but you should never need to worry about fan-in/out. This is the 21st century. Two stages of NAND or NOR gates makes an AND-OR structure from which any logic can be compiled, usually by software. If you are doing logic reduction by hand, you will make mistakes, so write your logic in high level terms that are not confused by logic inversion etc.
